A small step for a hobby logic designer, but a giant leap for @tinytapeout. The first official RISC-V uLinux ASIC, yes, ASIC, you heard that right, is operational and functional. Just dabbling in chip design as a hobbyist. Haha, what an awesome achievement! Thanx to @matthewvenn @UriShaked @tnt4all Rebellmike troyburn @PsychogenicTech #tinytapeout #chipdesign #verilog #130nm #Skywater #yosys #openlane @WokwiMakes #logicDesign #logicDestroyer
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C++23 is not for toy-language coders. If you're playing with PHP, JS, Python, or Rust , stay in your lane. This is for real engineers with academic background.
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All you need to master CS: a book, an editor, and a C compiler. Nothing else.
Replying to @splinedrive
In college I promised myself to deeply understand algorithms. So I reimplemented almost all of them in C from scratch using only a textbook.
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Don't fuck with Linux systems engineers. The KianV RISC-V Linux SoC, running the latest stable Linux kernel 6.9.4, was published today :) @obr2021
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I believe that is the future in the next decade
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Don't fuck with Linux systems engineers. The KianV RISC-V Linux SoC, running the latest stable Linux kernel 6.9.5, was published today :)
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May 2022: Kianv RISC-V Baremetal Achievement
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C is only for people who know exactly what they're doing , those who love portable assembly, in the tradition of Unix, Ken Thompson, and Dennis Ritchie.
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Don't fuck with Linux systems engineers. The KianV RISC-V Linux SoC, running the latest stable Linux kernel 6.9.6, was published today :)
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Don't fuck with Linux systems engineers. The KianV RISC-V Linux SoC, running the latest stable Linux kernel 6.9.8, was published today :)
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What you see is only a tiny slice of my fpga arsenal.
What you see is only a tiny slice of my fpga arsenal.
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Here is my first CPU, which I developed with trial and error without much knowledge. And then I decided to take an edX course in computer architecture by Harris, to transform my empirical knowledge into formal knowledge. And had started a reimplementation. github.com/splinedrive/kianR…
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In this thread, I will try to teach you about a RISC-V processor, piece by piece! You can take a look at the image that depicts the instructions and registers of an RV32I (simpelst) and ask questions before we gradually delve into the design. #riscv #twitterSchool 1
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With the knowledge I've now acquired, I absolutely must read Tanenbaum's book on operating system design again after this project, because now I will truly understand it. I've experienced everything myself, from virtual memory and networking to the exceptions that occur and their
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It's crazy that the KianV RV32IMA SV32 FPGA SoC has executed ~557 000 000 000 RISC-V instructions in 15 days, providing me with a fully functional Linux SoC. It’s unbelievable! I’ve done many silly things, but the SoC just keeps working and working.
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Forget GPUs. Map the RISC-V register file to HDMI, use it as a framebuffer, and blast RISC-V across the screen on a kianV bare-metal beast. @davepl1968
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Allow me to introduce my RISC-V #KianV machine, which boots #Linux on the FPGA with SDRAM. It's a simple design, but powerful. Starting with my vacation. How awesome... Linux and RISC-V forever... #Verilog is my life. #riscv
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The Motorola 68020 had a 32-bit address bus, ALU, and MMU—all the way back in 1984. What more could you want? It was the foundation for BSD Unix (Sun), the Macintosh II, and the Amiga 1200. Basically, the first cool Unix processor. And not a broken instruction set like the Intel 80386. de.wikipedia.org/wiki/Motoro…
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As a professional C/C++ engineer I've never introduced memory leaks or unintended side effects, even on devices deployed at scale. Mastery of the machine matters; those without it should use higher-level languages.
Rust turns me off: it’s always being forced on you. Feels like a cult; reeks of communism!
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If you want to learn real computer engineering or computer science with Linux or xv6, use the KianV SoC — a minimal RISC-V system with IPv6/IPv4 networking and GPIO, always running the latest Linux kernel. Write Unix-style C or C++ programs and run them directly on the SoC. The time of commercial SoCs and Arduino is over. A new era begins: KianV — learning Unix systems the right way. github.com/splinedrive/kianR…
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Fuck Rust. I like being unsafe. Fuck you.
Replying to @splinedrive
Forget drivers, forget buffers. HDMI scrolling on the RISC-V register file in pure assembly. Bow to the silicon.
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Running a sine wave + FFT in C++23 on my RISC-V FPGA SoC with Linux KianV style. lol.
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I love C and Linux. Seeing Rust become part of the kernel feels like a violation of everything it stood for.
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Let’s make C and C++ great again! Let’s bring it back strong!
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Interested in a Linux RISC-V MMU system with the latest kernel 6.6.8 and easy to understand, as it's not rocket science? Yes, if so, then here's the Verilog source code. Have fun exploring.
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The modern C++ compiler is probably the most complex piece of software humans have ever built. It compiles every paradigm, and your regret.
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December 2022—the moment of joy when I, an idiot, wrote an SDRAM controller, and my custom RISC-V CPU was about to run the memory test...
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The problem isn't Rust, the real issue is the clueless users behind it. They're hiding their incompetence, their unwillingness to understand how the machine actually works. That's why it's turned into a cult: it gives fools the comforting delusion that they're doing real engineering .
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Vibe coding is the downfall of humanity.
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They told us CS wasn’t about coding. Now the ones who believed that drive taxis. I write code and get paid.
actually, to master CS, you do not need a computer at all for the first 80% of it
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Let's write C++23 code in an academic style. I aim to implement a modern C++ threading example using 100 threads—both with and without mutex protection—on my self-designed, from-scratch RISC-V Linux SoC, KianV
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That’s how I started back in 2021 as well..
I made a working RISC-V CPU today! Well, a CPU that can execute 4 RISC-V instructions. Just enough to count in a loop and flash LEDs. Worked first time too. This is a machine code learning project for me.
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My self-built KianV RISC-V processor in 2021. Good times!
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A real embedded developer lives and dies by C.
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The worst two weeks of my life were almost two years ago when I turned my bare-metal CPU into a full-fledged Linux CPU during my vacation. A few days of coding, then a nightmare week of debugging just to finally see the shell. I still haven’t recovered from it. I think I was debugging 20 hours a day lol
Folks, the MMU is already running a bit in Verilog with Verilator. It's also synthesizable. But it still lacks a TLB, and I need to expand the interrupt system. However, this is already a milestone. An MMU is crazy. Everything still needs to be optimized. #kianV #riscv #linux
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I do hardcore hobby engineering.
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In 2022, I worked through Let's Build a Compiler by James Crenshaw. I translated the Pascal code into C and generated RV32IMA assembly code. It was a lot of fun.
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Von Neumann vs. Dataflow The title "CPU versus FPGA" is incorrect. piped.video/watch?v=BML1YHZp…
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It blows my mind , you need a degree and certification to touch a body with a scalpel, but any idiot with a laptop can code something that controls planes, hospitals, or reactors. No barrier. No accountability. Just chaos waiting to happen.
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What you see is only a tiny slice of my fpga arsenal.
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C is the preferred programming language among chip designers.
Replying to @splinedrive
We are ASIC @tinytapeout
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People still don’t get that CPU vs. FPGA isn’t a valid comparison. I’ve lost faith in humanity.
CPU vs FPGA:
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The Journey of an Embedded Systems Engineer: From Logic Design to Implementing a Linux SoC and Beyond github.com/splinedrive/kianR…
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I’ve never understood the big fuss about pointers — it’s just a reference to an address. In RISC-V, a load/store uses a register plus an immediate to access the address for reading or writing.
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Morse S.O.S. on one of the most minimal yet full-featured Linux RISC-V SoCs out there — in C++, no problem. KianV: the non-award-winning RISC-V SoC — LMAO.
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I imagine—if during soldering I inhale a dozen of them, and my lungs take the hit. techeblog.com/texas-instrume…
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Folks, the MMU is already running a bit in Verilog with Verilator. It's also synthesizable. But it still lacks a TLB, and I need to expand the interrupt system. However, this is already a milestone. An MMU is crazy. Everything still needs to be optimized. #kianV #riscv #linux
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Dude, you build your own Linux machine, communicate over I2C from Linux with the TEA5767 FM module, select your program using your own C application, cross-compiled with your toolchain, and then run it from an NFS-mounted partition. I’m done with other commercial SoCs… KianV SoC, the Linux maniac!
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So guys, my TT07 TinyTapeout ASIC has arrived! It features two designs from my family—my 9-year-old son with his 8-bit counter, and me with my RISC-V KIANV RV32E SoC that can play music. @tinytapeout
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C++ is still the industry standard in embedded & safety-critical systems. Backed by certifications (MISRA, ISO 26262), mature toolchains, vendor SDKs, and massive legacy code. You don’t rewrite that overnight, nor should you.
Bjarne Stroustrup, the man behind C++, a language that’s pushed many developers to their limits and sent some running to memory-safe languages. stroustrup.com/
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The craziest thing is, I own it and much more—I'm completely messed up in the head. 😆🔥
I love this picture! ❤️❤️❤️❤️❤️❤️
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I’m not using Viagra. I have a @DigilentInc Genesys 2 board with a Kintex 7 FPGA using Vivado. I’ve added backface culling to my fixed point Gouraud shaded Stanford Bunny on the KianV RISC V FPGA SoC running in real time.
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Rust is German. Restriction. Only restriction and rules. No freedom. Self-destruction.
Programming languages as countries. I’ll start. C is obviously the USA.
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Wrote a brutal C++23 CPU monitor for my KianV RISC-V Linux SoC on FPGA. It uses 8 GPIO LEDs to show live CPU load. Clean modern C++, signal-safe shutdown, no mercy , just pure hardware feedback.
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So folks, let me introduce the KianV RISC-V SV32 RV32IMA Real MMU Linux SoC. I've hacked a bootloader that boots from an SD card, and the design worked without any problems right away. I'm both surprised and shocked, it took less than a month, and we can boot LINUX on the FPGA.
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In the mood to provoke again, Kianv RISC-V SoC, the provocateur :) @elonmusk
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Back in May 2022, when I got my first program running on a bare-metal RISC-V SoC that fits into an iCE40HX1K FPGA with only 1280 LUTs... that was some crazy shit!
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Fuck the C series! Rewrote my GPIO wave script in modern C++17 for KianV (RISC-V Linux SoC). Cleaner, faster, and type-safe. #RISC-V #CPlusPlus #FPGA #GPIO #KianV
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I'm telling you — I'm gonna make 32-bit RISC-V CPUs great again.
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AI is fast food for the brain. Quick, tasty, zero nutrients. If you eat too much, don’t expect to build real muscles. Same goes for coding.
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Quicksort in Rust — or as I like to call it, broken programming.
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Embedded programming means you’re really close to the hardware — not way up on the meta level dealing with things like Python or data models. Instead of working on high software abstraction layers, as an embedded developer you’re right down at the machine level, dealing with real-time operations in audio, video, and many other areas.
"Embedded Programming" Is a completely useless term which does not mean anything. It means wildly different things to different people. My bet: If you try and disagree with me, you'll unironically prove my point.
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You just want to learn RISC-V assembly — not get dragged into that Rust cult. If you're serious about the ISA of the next decades, this is where you gotta be.
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Don't fuck with Linux systems engineers. The KianV RISC-V Linux SoC, running the latest stable Linux kernel 6.10.3, was published today :) @obr2021
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Hello, I am Kianv RISC-V. I can run operating systems like xv6 and Linux (currently v6.13-rc2). I support IPv4/IPv6, and I can even run X11 if I have 64 MiB of memory. I don't consume much logic, achieving over 6 MIPS on Artix-7 with SDRAM and simple logic. I use only 4580 LUT6 on FPGA.
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RISC-V Linux Kernel is the future!
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I had originally planned not to write any Verilog for a few months. But I just got overwhelmed; it’s been raining outside the whole time. So, I'll just do a little bit, maybe for an hour at most. But it feels amazing! 🧡🥰 RISC-V
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Allow me to briefly introduce, this is my first CPU, which I obtained through the knowledge from the edX course, Building RISC-V. At the time, I didn't know that this is called a single cycle. I intuitively built a multi-cycle CPU because the memory must synchronously hold both
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Oh - wow! Simulation was right. First time right, time to market. See the improvement of my new simple #dma implementation to relieve #kianRiscV #riscv #cpu applications can use dma memcpy, memset: left #ulx3s dma based, right cpu based operations..I will share it next on github
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My first RISC-V SoC, KianV, in June 2021 without any knowledge – LMAO
Replying to @splinedrive
It works and works 💕💯
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I agree with that meme, it's going in the wrong direction. People are unable to write something from scratch. I don't know how such people can be productive. You should think in transistors and assembly instructions—that's the way 😂
No one understand the pain of Full Stack Developers 🤣🤣🤣
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C++ is basically a disease, a money-laundering scheme. Some guys, constantly trying to prove themselves, keep writing and adding to the standards. It's complete and utter nonsense. But if you just use a subset of it, it's damn good. Still, it's bloated and has become an industry for some people who just want to cash in on it. God night
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I learned it at TU Berlin: computer science is mathematics, above all the simple kind.
Why do academics write code like this in papers? Wouldn't a real language make more sense?
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People, I’ve written this from my own point of view. Only because of my academic background was I able to understand C++23 and all these crazy concepts. C++ is bloated, yes, but if you start coding a project from scratch in modern C++23 or future versions, it’s actually a nice language. C and C++ won’t go away in the next 20 years or even longer. These tools run real systems, and a real engineer doesn’t change something that’s already working.
C++23 is not for toy-language coders. If you're playing with PHP, JS, Python, or Rust , stay in your lane. This is for real engineers with academic background.
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In college I promised myself to deeply understand algorithms. So I reimplemented almost all of them in C from scratch using only a textbook.
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Just implemented RISCV quicksort in C on #kianv SoC. Visualized both average & worst-case performance using heatmaps. Sorting at the silicon edge! #RISCV #quicksort #FPGA #LogicDestroyer #SoC #embedded #C
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Just got the IcePi Zero v1.3 from @icyelectronics ! KianV now officially supports this FPGA, and you can boot mainline Linux on it. Have fun experimenting!
Icepi Zero ECP5 + KianV RISC V now boots Linux 6.17 rc4 @icyelectronics crowdsupply.com/icy-electron…
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That just looks absolutely awesome, first verilog code of 2025 :)
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Real engineers operate at the metal with Assembly and C, designing logic where it actually matters. Rust and JavaScript coders are replaceable noise — background clutter that AI will wipe out without a second thought.
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May I introduce #Linux on the #icoboard #ICE40 HX8K. #riscv
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The latest C++ compiler for modern C++ must be one of the most complex pieces of software on Earth.
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Strap on our Troy Lee Designs enduro gloves and shred that donut with the gyro pure C on the KianV RISC-V HDMI SoC.
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Yeah, dudes, we’re talking about RISC-V and it’s 2025, but people built CPUs without the technology we now have at home and in our pockets. Here’s the OpenSPARC source code. According to @samsoniuk , it must’ve been done by aliens: pipelined, superscalar, out-of-order (OoO), with simultaneous multi-threading. … Have fun! oracle.com/servers/technolog…
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My first ASIC that I developed has arrived. I am overwhelmed. I am looking forward to testing my first design and others' as well. Long live @tinytapeout. #TinyTapeOut ❤️🫵 @tnt @UriShaked @matthewvenn @PsychogenicTech
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Thank you, @ATaylorFPGA , for gifting me that amazing #FPGA #XILINX #ARTIX-7 wukong board from #QMTech @zyjnumber1. This board has both DDR and SDRAM on the PCB, which is really nice for porting Kianv RISC-V Linux SoC, with SDRAM as the first step. Also, thanks to @obr2021 , who showed me this board.
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LOL – awesome pure fixed-point implementation, double buffering cube crap, DMA crap, KiANV RISC-V crap.
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Soon it’ll be China’s turn, and then we'll only have geopolitically correct Linux kernels. It's so stupid to cancel people based on their background. What the hell is that about? It doesn't reflect well on people at all.
Linus Torvalds Comments On The Russian Linux Maintainers Being Delisted The decision stands. phoronix.com/news/Linus-Torv…
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Reading this book and checking out my github implementation that follows it will give you understanding. #riscv #verilog #coding #understanding github.com/splinedrive/kianR…
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Haven't compiled a Linux kernel for my Kianv SV32 Linux/XV6 SoC in a long time. But as of today, Linux 6.13.0 mainline is running on my sweet Icesugar Pro... lalalallalalala!
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Oh, what madness! Now I have multiple UARTs, booting from the SD card, and even a C compiler, with which I can execute programs on my uLinux SoC that have been edited with vi. Oh man, I'm about to faint. RISC-V RV32IMA KianV SoC. #tcc #linux #riscv 💯😂💢🙏 @samsoniuk 💢🙏
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C++23 on KianV RISC-V SoC Bubble sort with VT220 animation using: std::span for generic views std::views::zip + drop for clean pairwise iteration No heap, no macros, just elegant modern #cpp #RISCV #FPGA #Linux #CPlusPlus #Embedded
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Let's hand-roll a raw socket HTTP server in C++23 on my custom KianV RISC-V Linux FPGA SoC because frameworks are for mortals.
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Now I have a real Linux machine accessible over the wide internet. GPIO, SD card, rv32ima sv32 Linux SoC, generic terminals, Ethernet says hello. The future belongs to KIANV RISC-V Linux machine, big thanks to @ATaylorFPGA and @samsoniuk, you know why :) #fpga #verilog
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My company uses the Google C++ style guide. It's clean, consistent, and I think it's great. google.github.io/styleguide/…
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Background isn’t wallpaper, it’s the RISC-V register file flexing.
Replying to @splinedrive
Double-buffered framebuffer fused to a 32×32 RISC-V core, annihilating 3D pixels raw.
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I was criminally good today and initially introduced a TLB64. I've achieved a significant performance gain. The boot time has almost halved, the human shader is now 20 seconds faster. Telnet is also more responsive now. ❤️ to @samsoniuk KianV #riscv #Linux @risc_v
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I actually developed the machine without any computer architecture knowledge. I used only my pure software knowledge to build it. It's only in the past few weeks that I've been diving into processor design.
Interested in a Linux RISC-V MMU system with the latest kernel 6.6.8 and easy to understand, as it's not rocket science? Yes, if so, then here's the Verilog source code. Have fun exploring.
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Yes, that's how I learned to implement RISC-V.
Sarah #Harris, David Harris - Digital Design and Computer Architecture #RISC-V Edition
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